ECC enabled memory means additional information called ECC (Error correction code) is stored in memory in addition to actual data. These ECC bits are used to check consistency of the data when data is read from the memory. Using ECC code any data corruption can be detected and corrupted data can be corrected.
To detect or correct errors on N bit data word requires M bits of ECC code. Number of bits required to store N bit data word is N+M bits. M bits of ECC code for every N bit data word is area overhead to support ECC.
Upon a write access to memory, ECC will be computed and written to memory along with the data. When data is read, consistency of data is checked using ECC bits, data errors may or may not corrected based on the ECC scheme.
Typically in a system, memories are accessed by the CPU or peripheral or both. CPU or peripheral can initiate accesses of different sizes that are byte access (8 bit), half word access (16 bit) and full word accesses (32 bit). If the size of the accesses is less than memory word size N then a read modify write (RMW) needs to be performed to update the data in to the memory, a write access with size smaller than memory word size N is called partial write. For a partial write to memory a RMW operation is required because only part of the data word N is getting updated and ECC is for the whole word, current memory contents are needed to recalculate the ECC word.
A RMW operation is a two cycle operation as ECC word is shared by the whole word. This will impact the overall system throughput as RMW operation takes one extra cycle to complete a partial write.